Browsing by Author César Augusto Missio Marcon

Skip to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:  
Showing rec. 21 to 40 of 188   ◄ previous       next ►  
Issue DateTitleAuthor(s)
2016A Security Aware Routing Approach for NoC-based MPSoCsRamon Fernandes; Martha Johanna Sepúlveda Flórez; Rodrigo Cataldo, et al
2017A Security-aware Routing Implementation for Dynamic Data Protection in Zone-based MPSoCMartha Johanna Sepúlveda Flórez; Ramon Fernandes; César Augusto Missio Marcon, et al
2017A Security-aware Routing Implementation for Dynamic Data Protection in Zone-based MPSoCMartha Johanna Sepúlveda Flórez; Ramon Fernandes; César Augusto Missio Marcon, et al
2022A Survey on Two-Dimensional Error Correction Codes Applied to Fault-Tolerant SystemsDavid Freitas; César Augusto Missio Marcon; Jarbas Silveira, et al
2021A Trajectory Inference-based Technique for Energy Efficient Store-and-Forward TechnologyAntônio Rodrigo Delepiane De Vit; Raul Ceretta Nunes; César Augusto Missio Marcon
2007A VHDL based approach for fast and accurate energy consumption estimationsCésar Augusto Missio Marcon; FILHO, SERGIO JOHANN; Fabiano Passuelo Hessel
2004Abstract rtos modeling for embedded systemsFabiano Passuelo Hessel; DA ROSA, V.M.; REIS, I.M., et al
2016Accurate Model for Network-on-Chip Performance Evaluation Based on Timed Colored Petri NetJarbas Silveira; Alan Cadore; Giovani Cordeiro Barroso, et al
2016Accurate Model for Network-on-Chip Performance Evaluation Based on Timed Colored Petri NetJarbas Silveira; Alan Cadore; Giovani Cordeiro Barroso, et al
2017An Efficient, Low-Cost ECC Approach for Critical-Application MemoriesFelipe Silva; Walter Freitas Jr; Jarbas Silveira, et al
2018An Extensible Code for Correcting Multiple Cell Upset in Memory ArraysSILVA, FELIPE; SILVEIRA, JARDEL; SILVEIRA, JARBAS, et al
2013An implementation of a distributed fault-tolerant mechanism for 2D mesh NoCsCésar Augusto Missio Marcon; Alexandre Amory; Thais Christina Webber Dos Santos, et al
2019Analysis of parallel encoding using tiles in 3D High Efficiency Video CodingGustavo Freitas Sanchez; Mário Saldanha; Luciano Agostini, et al
2017Analysis of Routing Algorithms Generation for Irregular NoC TopologiesRonaldo Milfont; Paulo Cesar Cortez; Alan Cadore, et al
2017Analysis of Routing Algorithms Generation for Irregular NoC TopologiesRonaldo Milfont; Paulo Cesar Cortez; Alan Cadore, et al
2021Analysis of VVC Intra Prediction Block Partitioning StructureMário Saldanha; Gustavo Freitas Sanchez; César Augusto Missio Marcon, et al
2004Applying Memory Test to Embedded SystemsCésar Augusto Missio Marcon; Alexandre Amory; Marcelo Lubaszewski, et al
2011Arbitration and routing impact on NoC designEdson I. Moreno; César Augusto Missio Marcon; Ney Laert Vilar Calazans, et al
2016Architectural Exploration of Last-Level Caches targeting Homogeneous Multicore SystemsRodrigo Cataldo; Guilherme Korol; Ramon Fernandes, et al
2016Architectural Exploration of Last-Level Caches targeting Homogeneous Multicore SystemsRodrigo Cataldo; Guilherme Korol; Ramon Fernandes, et al