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Please use this identifier to cite or link to this item: https://hdl.handle.net/10923/23428
Type: conferenceObject
Title: High Level RTOS Scheduler Modeling for a Fast Design Validation
Author(s): Fabiano Passuelo Hessel
César Augusto Missio Marcon
SANTOS, TATIANA
In: <![CDATA[IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)]]>, Brasil.
Issue Date: 2007
URI: https://hdl.handle.net/10923/23428
DOI: DOI:10.1109/ISVLSI.2007.49
ISBN: 0769528961
Appears in Collections:Apresentação em Evento

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