| Campo DC | Valor | Idioma |
|---|
| dc.contributor.author | VILLA, PAULO R. C. | - |
| dc.contributor.author | TRAVESSINI, RODRIGO | - |
| dc.contributor.author | GOERL, ROGER C. | - |
| dc.contributor.author | Fabian Luis Vargas | - |
| dc.contributor.author | BEZERRA, EDUARDO A. | - |
| dc.date.accessioned | 2021-09-24T21:01:50Z | - |
| dc.date.available | 2021-09-24T21:01:50Z | - |
| dc.date.issued | 2019 | - |
| dc.identifier.issn | 0923-8174 | - |
| dc.identifier.uri | https://hdl.handle.net/10923/18523 | - |
| dc.language.iso | en | - |
| dc.relation.ispartof | JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS | - |
| dc.rights | openAccess | - |
| dc.subject | Fault-tolerance | - |
| dc.subject | Checkpoint recovery | - |
| dc.subject | Soft-core processors | - |
| dc.subject | FPGAs | - |
| dc.subject | Single-event upsets | - |
| dc.title | Fault Tolerant Soft-Core Processor Architecture Based on Temporal Redundancy | - |
| dc.type | Article | - |
| dc.date.updated | 2021-09-24T21:01:49Z | - |
| dc.identifier.doi | DOI:10.1007/s10836-019-05778-z | - |
| dc.jtitle | JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS | - |
| dc.volume | 1 | - |
| dc.spage | 1 | - |
| Aparece nas Coleções: | Artigo de Periódico
|
