| Campo DC | Valor | Idioma |
|---|
| dc.contributor.author | Matheus Trevisan Moreira | - |
| dc.contributor.author | Ney Laert Vilar Calazans | - |
| dc.date.accessioned | 2019-02-12T12:25:24Z | - |
| dc.date.available | 2019-02-12T12:25:24Z | - |
| dc.date.issued | 2013 | - |
| dc.identifier.uri | http://hdl.handle.net/10923/13974 | - |
| dc.language.iso | en | - |
| dc.relation.ispartof | Proceedings of the ISVLSI 2013, 2013, Brasil. | - |
| dc.rights | openAccess | - |
| dc.subject | Asynchronous Circuits | - |
| dc.subject | Standard Cell | - |
| dc.subject | Design flow | - |
| dc.title | Design of Standard-Cell Libraries for Asynchronous Circuits with the ASCEnD Flow | - |
| dc.type | conferenceObject | - |
| dc.date.updated | 2019-02-12T12:25:24Z | - |
| Aparece en las colecciones: | Apresentação em Evento
|
