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Please use this identifier to cite or link to this item: https://hdl.handle.net/10923/13969
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dc.contributor.authorAdriel Ziesemer Jr.-
dc.contributor.authorRicardo Augusto da Luz Reis-
dc.contributor.authorMatheus Trevisan Moreira-
dc.contributor.authorMichel Evandro Arendt-
dc.contributor.authorNey Laert Vilar Calazans-
dc.date.accessioned2019-02-12T12:04:59Z-
dc.date.available2019-02-12T12:04:59Z-
dc.date.issued2014-
dc.identifier.urihttp://hdl.handle.net/10923/13969-
dc.language.isoen-
dc.relation.ispartofProceedings of the 5th LASCAS 2014, 2014, Chile.-
dc.rightsopenAccess-
dc.subjectAsynchronous Circuits-
dc.subjectLayout Synthesis-
dc.subjectAsynchronous Cells-
dc.titleAutomatic Layout Synthesis with ASTRAN Applied to Asynchronous Cells-
dc.typeconferenceObject-
dc.date.updated2019-02-12T12:04:58Z-
Appears in Collections:Apresentação em Evento

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