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Fecha de Publicación	Título	Autor(s)
2013	BaBaNoC: An asynchronous network-on-chip described in Balsa	MOREIRA, MATHEUS T.; MAGALHAES, FELIPE G.; GIBILUKA, MATHEUS; Fabiano Passuelo Hessel; CALAZANS, NEY L. V.
2017	Estimation methods for static noise margins in CMOS subthreshold logic circuits	BORTOLON, FELIPE T.; Fernando Gehm Moraes; MOREIRA, MATHEUS T.; BAMPI, SERGIO
2013	Charge sharing aware NCL gates design	MOREIRA, MATHEUS T.; OLIVEIRA, BRUNO S.; Fernando Gehm Moraes; CALAZANS, NEY L. V.
2015	SDDS-NCL Design	GUAZZELLI, RICARDO A.; Fernando Gehm Moraes; CALAZANS, NEY L. V.; MOREIRA, MATHEUS T.
2015	A digitally controlled oscillator for fine-grained local clock generators in MPSoCs	HECK, GUILHERME; HECK, LEANDRO S.; MOREIRA, MATHEUS T.; Fernando Gehm Moraes; CALAZANS, NEY L. V.
2012	Return-to-one protocol for reducing static power in C-elements of QDI circuits employing m-of-n codes	MOREIRA, MATHEUS T.; GUAZZELLI, RICARDO A.; Ney Laert Vilar Calazans
2012	Return-to-One DIMS logic on 4-phase m-of-n asynchronous circuits	MOREIRA, MATHEUS T.; GUAZZELLI, RICARDO A.; Ney Laert Vilar Calazans
2012	Electrical characterization of a C-Element with LiChEn	MOREIRA, MATHEUS T.; Ney Laert Vilar Calazans
2021	A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators	JURACY, LEONARDO R.; MOREIRA, MATHEUS T.; AMORY, ALEXANDRE M.; Fernando Gehm Moraes
2020	A Frontend using Traditional EDA Tools for the Pulsar QDI Design Flow	SARTORI, MARCOS L. L.; MOREIRA, MATHEUS T.; Ney Laert Vilar Calazans