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Results 1-8 of 8 (Search time: 0.004 seconds).
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Issue Date
Title
Author(s)
2015
A Bundled-Data Asynchronous Circuit Synthesis Flow Using a Commercial EDA Framework
Matheus Gibiluka
;
Matheus Trevisan Moreira
;
Ney Laert Vilar Calazans
2015
Blade - A Timing Violation Resilient Asynchronous Template
Dylan Hand
;
Matheus Trevisan Moreira
;
Hsin-Ho Huang
;
Danlei Chen
;
Frederico Butzke
;
Zhichao Li
;
Matheus Gibiluka
;
Melvin Breuer
;
Ney Laert Vilar Calazans
;
Peter Anthony Beerel
2015
A Fine-Grained, Uniform, Energy-Efficient Delay Element for FD-SOI Technologies
Ajay Singhvi
;
Matheus Trevisan Moreira
;
Ramy Nagy Tadros
;
Ney Laert Vilar Calazans
;
Peter Anthony Beerel
2015
Analysis and Optimization of Programmable Delay Elements for 2-Phase Bundled-Data Circuits
Guilherme Heck
;
Leandro Sehnem Heck
;
Ajay Singhvi
;
Matheus Trevisan Moreira
;
Ney Laert Vilar Calazans
;
Peter Anthony Beerel
2015
Performance Optimization and Analysis of Blade Designs Under Delay Variability
Dylan Hand
;
Hsin-Ho Huang
;
Benmao Cheng
;
Yang Zhang
;
Matheus Trevisan Moreira
;
Melvin Breuer
;
Ney Laert Vilar Calazans
;
Peter Anthony Beerel
2015
Tradeoffs Between RTO and RTZ in WCHB QDI Asynchronous Design
Matheus Trevisan Moreira
;
Julian José Hilgemberg Pontes
;
Ney Laert Vilar Calazans
2015
SDDS-NCL Design: Analysis of Supply Voltage Scaling
Ricardo Aquino Guazzelli
;
Fernando Gehm Moraes
;
Ney Laert Vilar Calazans
;
Matheus Trevisan Moreira
2015
TDTB Error Detecting Latches: Timing Violation Sensitivity Analysis and Optimization
Matheus Trevisan Moreira
;
Dylan Hand
;
Peter Anthony Beerel
;
Ney Laert Vilar Calazans
Explore
Author
8
Ney Laert Vilar Calazans
5
Peter Anthony Beerel
3
Dylan Hand
2
Ajay Singhvi
2
Hsin-Ho Huang
2
Matheus Gibiluka
2
Melvin Breuer
1
Benmao Cheng
1
Danlei Chen
1
Fernando Gehm Moraes
.
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Subject
5
Asynchronous Circuits
2
Bundled-Data
2
Delay Element
2
Resilient Architectures
2
Voltage Scaling
1
asynchronous design
1
Asynchronous Templates
1
Automated Synthesis
1
Delay Variability
1
Energy Efficiency
.
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