Skip navigation
Home
Browse
Communities
& Collections
Browse Items by:
Issue Date
Author
Title
Subject
About
About the Institutional Repository
Use Policy
FAQs (Frequently Asked Questions)
Credits
Access Statistics
Sign on to:
My DSpace
Receive email
updates
Edit Profile
Repositório PUCRS
Search
Search:
All Repository
PUBLICAÇÕES CIENTÍFICAS
Apresentação em Evento
for
Current filters:
Title
Author
Subject
Date Issued
Equals
Contains
ID
Not Equals
Not Contains
Not ID
Title
Author
Subject
Date Issued
Equals
Contains
ID
Not Equals
Not Contains
Not ID
Title
Author
Subject
Date Issued
Equals
Contains
ID
Not Equals
Not Contains
Not ID
Start a new search
Add filters:
Use filters to refine the search results.
Title
Author
Subject
Date Issued
Equals
Contains
ID
Not Equals
Not Contains
Not ID
Results 1-10 of 29 (Search time: 0.001 seconds).
previous
1
2
3
next
Item hits:
Issue Date
Title
Author(s)
2016
Design and Analysis of the HF-RISC Processor Targeting Voltage Scaling Applications
Felipe Bortolon
;
Matheus Gibiluka
;
Sérgio Johann Filho
;
Sergio Bampi
;
Ney Laert Vilar Calazans
;
Fabiano Passuelo Hessel
;
Matheus Trevisan Moreira
2017
A Comparison of Asynchronous QDI Templates Using Static Logic
Ricardo Aquino Guazzelli
;
Matheus Trevisan Moreira
;
Ney Laert Vilar Calazans
2015
A Bundled-Data Asynchronous Circuit Synthesis Flow Using a Commercial EDA Framework
Matheus Gibiluka
;
Matheus Trevisan Moreira
;
Ney Laert Vilar Calazans
2015
Blade - A Timing Violation Resilient Asynchronous Template
Dylan Hand
;
Matheus Trevisan Moreira
;
Hsin-Ho Huang
;
Danlei Chen
;
Frederico Butzke
;
Zhichao Li
;
Matheus Gibiluka
;
Melvin Breuer
;
Ney Laert Vilar Calazans
;
Peter Anthony Beerel
2017
Sleep Convention Logic Isochronic Fork: an Analysis
Ricardo Aquino Guazzelli
;
Walter Lau Neto
;
Matheus Trevisan Moreira
;
Ney Laert Vilar Calazans
2016
Analysis and Design of Delay Lines for Dynamic Voltage Scaling Applications
Ramy Nagy Tadros
;
Weizhe Hua
;
Matheus Gibiluka
;
Matheus Trevisan Moreira
;
Ney Laert Vilar Calazans
;
Peter Anthony Beerel
2015
A Fine-Grained, Uniform, Energy-Efficient Delay Element for FD-SOI Technologies
Ajay Singhvi
;
Matheus Trevisan Moreira
;
Ramy Nagy Tadros
;
Ney Laert Vilar Calazans
;
Peter Anthony Beerel
2015
Analysis and Optimization of Programmable Delay Elements for 2-Phase Bundled-Data Circuits
Guilherme Heck
;
Leandro Sehnem Heck
;
Ajay Singhvi
;
Matheus Trevisan Moreira
;
Ney Laert Vilar Calazans
;
Peter Anthony Beerel
2017
Hardening C-elements Against Metastability
Leandro Sehnem Heck
;
Matheus Trevisan Moreira
;
Ney Laert Vilar Calazans
2016
ASCEnD-FreePDK45: An Open Source StandardCell Library for Asynchronous Design
Carlos Henrique Menezes Oliveira
;
Matheus Trevisan Moreira
;
Ricardo Aquino Guazzelli
;
Ney Laert Vilar Calazans
Explore
Author
7
Ricardo Aquino Guazzelli
6
Peter Anthony Beerel
5
Carlos Henrique Menezes Oliveira
4
Matheus Gibiluka
4
Michel Evandro Arendt
3
Adriel Ziesemer Jr.
3
Dylan Hand
3
Guilherme Heck
3
Ricardo Augusto da Luz Reis
2
Ajay Singhvi
.
next ►
Subject
17
Asynchronous Circuits
7
Null Convention Logic
5
NCL
4
asynchronous design
4
C-element
4
Return-to-one
4
Standard Cell
4
Standard Cell Library
4
Voltage Scaling
3
Low Power
.
next ►
Issue Date
1
2019
3
2017
3
2016
8
2015
8
2014
6
2013