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Issue Date	Title	Author(s)
2013	ASCEnD: A Standard Cell Library for Semi-Custom Asynchronous Design	Matheus Trevisan Moreira; Carlos Henrique Menezes Oliveira; Ney Laert Vilar Calazans
2014	A Design Flow for Physical Synthesis of Digital Cells with ASTRAN	Adriel Ziesemer Jr.; Ricardo Augusto da Luz Reis; Matheus Trevisan Moreira; Michel Evandro Arendt; Ney Laert Vilar Calazans
2014	Semi-custom NCL Design with Commercial EDA Frameworks: Is it Possible?	Matheus Trevisan Moreira; Augusto Neutzling Silva; Mayler Gama Alvarenga Martins; André Inácio Reis; Renato Perez Ribas; Ney Laert Vilar Calazans
2013	LiChEn: Automated Electrical Characterization of Asynchronous Standard Cell Libraries	Matheus Trevisan Moreira; Carlos Henrique Menezes Oliveira; Ney Laert Vilar Calazans; Luciano Copello Ost
2014	Schmitt Trigger on Output Inverters of NCL Gates for Soft Error Hardening: is it Enough?	Ricardo Aquino Guazzelli; Guilherme Heck; Matheus Trevisan Moreira; Ney Laert Vilar Calazans
2013	NCL+: Return-to-One Null Convention Logic	Matheus Trevisan Moreira; Carlos Henrique Menezes Oliveira; Ricardo Cademartori Porto; Ney Laert Vilar Calazans
2013	Design of Standard-Cell Libraries for Asynchronous Circuits with the ASCEnD Flow	Matheus Trevisan Moreira; Ney Laert Vilar Calazans
2013	Voltage Scaling on C-Elements: A Speed, Power and Energy Efficiency Analysis	Matheus Trevisan Moreira; Ney Laert Vilar Calazans
2019	Pulsar: Constraining QDI Circuits Cycle Time Using Traditional EDA Tools	Marcos Luiggi Lemos Sartori; Rodrigo Nogueira Wuerdig; Matheus Trevisan Moreira; Ney Laert Vilar Calazans